1. Field
Packaging for microelectronic devices.
2. Description of Related Art
Microelectronic packaging technology, including methods to mechanically and electrically attach a silicon die (e.g., a microprocessor) to a substrate or other carrier continues to be refined and improved. Bumpless Build-Up Layer (BBUL) packaging technology is one approach to a packaging architecture. Among its advantages, BBUL packaging technology eliminates the need for assembly, eliminates prior solder ball interconnections (e.g., flip-chip interconnections), reduces stress on low-k interlayer dielectric of dies due to die-to-substrate coefficient of thermal expansion (CTE mismatch), and reduces package inductance through elimination of core and flip-chip interconnect for improved input/output (I/O) and power delivery performance.
With shrinking electronic device sizes and increasing functionality, there is a desire that integrated circuit packages to occupy less space. One way to conserve space is to combine a device or package on top of a package. One way of integrating second devices (e.g., secondary dice) vertically to, for example, a system on chip (SOC) package is through package on package (POP). With a drive for reduced thickness devices (e.g., handheld devices), constraints on POP device thickness or z-height remain a concern. In addition, constraints on routing distances between, for example, a central processing unit (CPU) of one package and a memory device or external input/output devices of another package also are relevant to, for example, the communication latency between devices.